Technology · Asia Pacific

Samsung plans to make Nvidia memory base dies with TSMC technology, report says

Samsung Electronics plans to use TSMC’s 3-nanometre process for base dies in Nvidia’s next-generation custom high-bandwidth memory chips, according to The News. The report says Nvidia asked Samsung and other memory suppliers to use that process for base dies, and Samsung accepted after an internal review.

AI-assisted synthesis · Based on 3 independent reports from 5 outlets · Article text read from 1 of 3 reportsHow it's made

View timeline · 9 entries

5 outletsLatest reporting Oct 18, 1:50 PM UTC3 min read

Coverage: Center OnlyL 0 · C 4 · R 0 · 1 unrated

File photo

Photo: Oskar Alexanderson / Wikimedia Commons (CC BY-SA 2.0)

What happened

Key facts

Samsung is set to use TSMC’s 3-nanometre manufacturing process for the base dies in Nvidia’s next-generation custom high-bandwidth memory chips (per thenews.com.pk, The Economic Times, businesstimes.com.sg).
Nvidia asked Samsung, SK Hynix and Micron Technology to use TSMC’s 3-nanometre process for base dies (per thenews.com.pk).
Nvidia’s request also called for sixth-generation DRAM technology for the chips’ core dies (per thenews.com.pk).
The article says Nvidia’s custom NVHBM design integrates a custom memory controller into the base die (per thenews.com.pk).
The article says Nvidia sought consistent implementation across memory suppliers and lower verification hurdles (per thenews.com.pk).
Samsung will continue using its in-house foundry model for standard HBM products and other client orders (per thenews.com.pk).

The brief

Samsung Electronics plans to use Taiwan Semiconductor Manufacturing Company’s 3-nanometre process to produce base dies for Nvidia’s next-generation custom high-bandwidth memory chips, The News reported. The report attributes the account to the Seoul Economic Daily.

The plan concerns the base dies, rather than a stated change to Samsung’s production approach for all of its memory products. According to The News, Nvidia asked its main memory suppliers—Samsung, SK Hynix and Micron Technology—to make the base dies using TSMC’s 3-nanometre process. Nvidia also specified sixth-generation DRAM technology for the core dies.

The article describes the request as applying across suppliers, rather than only to Samsung. The News says Nvidia’s custom NVHBM design places a custom memory controller directly in the base die. It reports that Nvidia sought consistent implementation among memory suppliers and wanted to reduce verification hurdles.

These are the reasons the article gives for Nvidia’s requested process; it does not provide further details about testing or the technical specifications of the chips. Samsung accepted Nvidia’s conditions after an internal review, according to The News.

The article says the decision secures Samsung’s place in the supply chain, but does not describe the terms of that position or provide a production schedule. The account does not state when manufacturing will begin or how many chips Samsung may produce. The article presents the move as a departure from Samsung’s customary approach.

It says Samsung has historically made both core and base memory dies on its own production lines. The planned use of TSMC’s process for these Nvidia base dies therefore differs from that described practice, while the report does not characterize it as a company-wide switch in manufacturing strategy.

Samsung is expected to retain its in-house foundry model for standard HBM products and other client orders, The News reported. That distinction places the TSMC process within the Nvidia-related arrangement described in the article; it does not indicate that Samsung will outsource production of its other memory products.

The report offers no further detail on how Samsung will divide manufacturing between its own lines and TSMC for particular orders. The Economic Times, The Business Times, Reuters and CNA also published headlines saying Samsung would use TSMC technology for Nvidia’s next-generation memory chips.

Their headlines do not specify the 3-nanometre process, the separate requirements for base and core dies, or Samsung’s acceptance after an internal review. The reported plan’s scope, supplier implementation and manufacturing timing remain the specific details to follow in the account.

Why it matters

Nvidia’s stated design puts a custom memory controller in the base die, linking its requested TSMC process to the architecture described for the custom chips.
Samsung’s acceptance would involve using TSMC’s 3-nanometre process for Nvidia base dies, while the article says Samsung will retain its in-house approach for standard HBM and other client orders.
Nvidia’s request names Samsung, SK Hynix and Micron Technology as suppliers asked to use the same base-die process, with sixth-generation DRAM specified for core dies.

What to watch next

Whether Samsung proceeds with TSMC’s 3-nanometre process for Nvidia’s base dies.
Whether SK Hynix and Micron Technology also use TSMC’s process for the base dies, as Nvidia requested.
Whether Samsung’s reported in-house model for standard HBM products and other client orders remains in place.

How it's being covered

Coverage analysisShow details

5 source articles · 5 unique outlets · 3 distinct reports

Outlet political mix: Center Only· 4 Center · 1 unrated

Where the outlets are based: Asia 80% · Global 20%

Outlet political mix

Center Only

Left

Center

Right

0 outlets

4 outlets

0 outlets

The marker shows coverage balance: each unique outlet counts once. 1 unrated outlet is not included.

Geography

Where the outlets covering this story are based.

5 unique outletsDominant coverage: Asia

All5 Asia4 · 80%Global1 · 20%

Coverage imbalance

Coverage is currently concentrated among Center-rated outlets (4 of 4 rated sources); comparatively few Left or Right-rated outlets have published on the event.
Coverage is currently concentrated among outlets based in Asia (4 of 5 geographically-identified sources).

How we measure coverage

One source is from a wire service (AP, Reuters, AFP or Bloomberg), whose reporting other outlets often republish.

How outlets' accounts compare

Updat3 does not yet have enough full reports to compare how outlets framed this story.

Timeline

Developments from this story's sources, dated background we compiled and fact-checked, and our earlier coverage. Each row says which.

Jan 1969
Samsung Electronics was established.
Background · compiled and fact-checked by Updat3
1978
Micron Technology was founded.
Background · compiled and fact-checked by Updat3
1983
Hyundai Electronics, later renamed SK hynix, was founded.
Background · compiled and fact-checked by Updat3
1987
TSMC was founded as a dedicated semiconductor foundry.
Background · compiled and fact-checked by Updat3
1993
Jensen Huang, Chris Malachowsky and Curtis Priem founded Nvidia.
Background · compiled and fact-checked by Updat3
Oct 2013
JEDEC published its first high-bandwidth memory standard, JESD235.
Background · compiled and fact-checked by Updat3
2015
AMD launched the Radeon R9 Fury, one of the first products to use high-bandwidth memory.
Background · compiled and fact-checked by Updat3
2022
Nvidia announced its Hopper architecture, whose H100 accelerator used HBM3.
Background · compiled and fact-checked by Updat3
Mar 2024
Nvidia’s March 2024 announcement of its Blackwell architecture put high-bandwidth memory at the center of its latest AI accelerators: the company said its B200 GPU would use HBM3E.
Background · from our historical context

How we got here

Nvidia’s March 2024 announcement of its Blackwell architecture put high-bandwidth memory at the center of its latest AI accelerators: the company said its B200 GPU would use HBM3E. That followed Nvidia’s 2022 launch of the Hopper architecture, whose H100 accelerator used HBM3. High-bandwidth memory stacks DRAM dies vertically and connects them to a processor through a base die.

The JEDEC standards body published its first HBM standard, JESD235, in October 2013; AMD’s 2015 Radeon R9 Fury was among the first products to use the technology.